Two's Complement in Hardware

Two's complement lets one adder handle signed and unsigned numbers, which is why nearly all digital hardware represents signed integers this way.

The representation

In an n-bit two's complement number the most significant bit has weight -2^(n-1) and the rest have their usual positive weights. To negate a value, invert all bits and add 1. There is a single representation of zero, unlike sign-magnitude or one's complement.

Why hardware likes it

Addition and subtraction use the exact same binary adder for signed and unsigned operands. The circuit does not need to know the sign; the bit pattern of the result is correct either way. This reuse is the main reason two's complement dominates.

Overflow detection

Signed overflow occurs when two operands of the same sign produce a result of the opposite sign. In hardware it is detected by comparing the carry into the sign bit with the carry out of it: if they differ, overflow occurred.

Sign extension

Widening a signed value to more bits requires copying the sign bit into all new high positions, called sign extension. This preserves the value, whereas zero-extension is correct only for unsigned numbers.

Range

An n-bit two's complement integer spans -2^(n-1) to 2^(n-1)-1. The asymmetry, one more negative value than positive, means negating the most negative number overflows.