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Digital Logic & Circuits

Register File Design

A register file is a small, fast multi-ported memory holding a processor's working registers, read and written every cycle.

The Processor's Scratchpad

A register file holds the handful of values a processor operates on directly: the architectural registers named by instructions. It is small (tens to a few hundred entries) but must be extremely fast, since nearly every instruction reads its operands from it and writes its result back. It sits at the top of the storage hierarchy, faster and smaller than any cache.

Ports and Parallelism

Kronos motion — design envelope

A superscalar processor issues several instructions per cycle, and each needs its operands at once, so the register file must be multi-ported: several independent read ports and write ports operating simultaneously. A machine issuing two instructions with two source operands each needs four read ports and two write ports. Ports are expensive: the cell area grows roughly with the square of the port count, because every cell must connect to every port's wires.

Physical Registers and Renaming

Out-of-order processors separate the architectural registers named in the instruction set from a larger pool of physical registers. Register renaming maps architectural names to physical entries on the fly to eliminate false dependencies, so the physical register file is much larger than the architectural count and holds many in-flight results at once. Its size and port count are among the most constrained resources in a wide core.

Reads, Writes, and Bypass

When an instruction reads a register that another instruction is writing in the same cycle, forwarding logic bypasses the register file to deliver the fresh value directly, avoiding a stale read. Some designs split the register file into banks or use replicated copies to add read bandwidth without paying the full multi-port cost. Careful register-file design is central to keeping a wide, fast processor fed.