AND Gate
The AND gate outputs 1 only when all of its inputs are 1, implementing logical conjunction.
What it does
The AND gate implements logical conjunction. Its output is 1 only when every input is 1; if any input is 0, the output is 0. In words, all conditions must hold at once.
Truth table
| A | B | A AND B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
Algebraic form
The AND operation is written as multiplication: A times B, often shown as AB or A and B. It obeys the identity A AND 1 = A and the annihilator A AND 0 = 0. It is commutative and associative, so inputs can be reordered or grouped freely.
How it is built
In CMOS an AND function is naturally a NAND followed by an inverter, because the pull-down network gives inversion for free. A standalone AND is therefore two stages, which is why NAND is often the cheaper primitive.
In code
out = a & b # bitwise AND on 0/1 values
out = a and b # logical AND on booleansWhere it appears
- Masking bits: a AND a mask keeps selected bit positions and clears the rest.
- Enable logic: gating a signal so it passes only when an enable line is 1.
- Address decoding: asserting a line only when a specific combination is present.
- Interlocks in control logic, where several conditions must be true to proceed.
AND is one of the most common building blocks, and combined with OR and NOT it can express any Boolean function.