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Digital Logic & Circuits

FIFO Buffers

A FIFO buffer stores data in first-in, first-out order, decoupling a producer and consumer that operate at different rates.

Smoothing Between Producer and Consumer

A FIFO (first-in, first-out) buffer is a queue in hardware: data written first is read first. Its purpose is to decouple two parts of a system that produce and consume data at uneven or unrelated rates. The producer writes whenever it has data and space is available; the consumer reads whenever it is ready and data is present. The FIFO absorbs bursts and gaps between them.

Pointers and Status

Kronos motion — materials first

A FIFO is usually a small memory with a write pointer and a read pointer. Writing advances the write pointer; reading advances the read pointer; both wrap around the memory (a circular buffer). Comparing the pointers yields two essential status flags: full, when writing would overtake reading, and empty, when the pointers coincide. These flags provide backpressure so no data is lost or read twice.

Synchronous and Asynchronous

A synchronous FIFO has both ports on the same clock, so pointer comparison is straightforward. An asynchronous FIFO has the write and read sides on different clocks, making it a clock-domain-crossing structure. There the pointers must be passed between domains safely, which is done with Gray-coded pointers, changing only one bit per step, and synchronizers, so full and empty are computed without metastability corrupting the counts.

Sizing and Uses

A FIFO must be deep enough to cover the worst-case rate mismatch and the latency of the flags themselves; too shallow and it overflows or stalls. FIFOs appear everywhere data crosses a boundary: between clock domains, between a bus and a slower peripheral, in DMA engines, and in the pipelines of network and storage hardware. They are one of the most reused building blocks in digital design.