SRAM Cell

An SRAM cell stores one bit in cross-coupled inverters, holding data as long as power is applied with no refresh needed.

Structure

The classic static RAM cell uses six transistors: two cross-coupled inverters that store the bit and two access transistors that connect the cell to a pair of bit lines. A word line turns the access transistors on to read or write.

How it holds a bit

The cross-coupled inverters form a bistable loop that latches one of two states and reinforces it continuously. As long as the cell is powered, the bit is held with no refresh. This is why it is called static memory.

Reading and writing

To read, the bit lines are precharged and the word line is asserted; the cell tips the bit lines slightly and a sense amplifier detects which way. To write, the bit lines are driven strongly to the desired values, overpowering the cell's feedback to force the new state.

Trade-offs versus DRAM

SRAM is fast and needs no refresh, but six transistors per bit make it less dense and larger than DRAM. It is used where speed matters most: processor caches and register files.

Volatility

SRAM is volatile: cut the power and the stored bits vanish. It trades permanence for speed, unlike non-volatile memory technologies.