Fan-In and Fan-Out
Fan-in is how many inputs a gate accepts; fan-out is how many inputs one output can reliably drive.
Fan-in
Fan-in is the number of inputs to a single gate. A three-input AND has a fan-in of three. Higher fan-in packs more logic into one gate but tends to increase propagation delay and to weaken drive, because more transistors sit in the switching path.
Fan-out
Fan-out is the number of gate inputs that one output drives. Each driven input presents a load; too many loads slow the edge and can push voltage levels toward the forbidden region between valid 0 and valid 1. Every gate has a maximum fan-out it can drive within its timing and level specifications.
Why fan-out is limited
- Each input adds capacitance, and charging more capacitance takes longer.
- Excessive current draw can degrade the output high and low levels.
- Long shared wires add resistance and capacitance on top of the gate loads.
- Exceeding the limit risks marginal levels and unreliable timing.
Managing high fan-out
When one signal must reach many destinations, insert a buffer or a tree of buffers to restore drive. A buffer tree splits a large load across several stages so each driver stays within its limit while the overall signal still reaches everything, at the cost of some added delay.
The trade-off
Fan-in and fan-out both trade capability against speed. More fan-in means fewer gates but slower ones; more fan-out means fewer buffers but slower edges. Good design balances these so the critical path meets its timing target.
In simulation
Logic simulators track fan-out to model realistic delays, since a node driving many loads switches measurably slower than a lightly loaded one.