Planar vs Toric Boundaries
Turning the toric code into a chip-buildable surface code requires open boundaries of two types, which set how many logical qubits a patch encodes.
From torus to plane
The toric code needs a torus, a periodic boundary in two directions that no planar chip provides. The surface code keeps the same local stabilizers but ends the lattice with real edges. Two kinds of boundary are used: a rough boundary, where plaquette-type stabilizers are truncated, and a smooth boundary, where vertex-type stabilizers are truncated.
Counting logical qubits
A single square patch with two opposite rough edges and two opposite smooth edges encodes exactly one logical qubit. The logical Z is a Z-string connecting the two rough boundaries, and the logical X is an X-string connecting the two smooth boundaries. These strings cannot be removed by stabilizers because their endpoints terminate on the boundary rather than closing into contractible loops.
- Rough boundary: e-type charges can be absorbed there.
- Smooth boundary: m-type fluxes can be absorbed there.
- Distance equals the shortest string from one like-boundary to the other.
- Extra logical qubits come from adding holes or extra boundary segments, not from the bulk.
Boundaries are also the raw material for logical operations. By growing, shrinking, or merging patches along their boundaries, a processor performs lattice surgery: measuring a joint logical operator of two patches by temporarily fusing them along a shared boundary. This is the mainstream route to two-qubit logical gates on planar hardware.
The trade is explicit: the torus gives two logical qubits for free but is unbuildable, while the plane gives one qubit per patch but runs on a flat array of qubits with only nearest-neighbor coupling, the connectivity superconducting and neutral-atom devices actually offer.