Sequential Logic
Digital logic whose outputs depend on both current inputs and stored past state.
Definition
Sequential logic incorporates memory: its outputs depend on the history of inputs as captured in internal state, not just the present inputs. State is held in clocked elements such as flip-flops.
Clock distribution is a discipline of its own: the clock must reach every storage element with minimal skew so all update together. As chips grow, delivering a clean, synchronized clock across the whole die becomes one of the harder engineering problems.
Modern chips contain multiple clock domains running at different frequencies, and passing signals safely between them requires synchronizer circuits to manage the risk of metastability. This clock-domain-crossing problem is a frequent source of intermittent, hard-to-reproduce failures when handled carelessly. Disciplined synchronous design, with well-defined clocks and explicit crossing logic, is what keeps large sequential systems reliable as they grow in size and speed.
Synchronous vs asynchronous
- Synchronous: state updates on a common clock edge (the norm).
- Asynchronous: state can change whenever inputs change.
- Synchronous design is easier to analyze and verify.
Why it matters
Sequential logic implements counters, memory, and state machines, everything that requires remembering what came before. Together with combinational logic, it forms every processor and controller.
Fusion connection
The staged, memory-dependent sequences that govern a fusion machine's operation are implemented as synchronous sequential logic, where each step depends on the verified completion of the last.