Plug-Coil FMEA
The burner's 26.49 T plug coil is overstressed 3-3.9x at the design bore - the dominant, gate-defining failure mode, stated without softening.
The gate is the FMEA
For the burner (Aegis / MetroVolt), the plug coil that must produce 26.49 T at the mirror throat's 17 T companion field is the single most important failure-mode entry, because the honest gate says the coil is overstressed ~3-3.9x at the design bore. That is not a low-probability tail; it is a statement that the coil as specified is infeasible without redesign. We score it accordingly and do not soften it.
Why detection is hard here
Detection score is elevated because the plug operating regime is 166-830x beyond any existing device, so there is no validated data to post-dict against. A structural or thermal precursor that would be obvious in a characterized coil may be un-modelable in an un-characterized regime. This compounds the stress gate: the mode is both likely and hard to see coming.
# The design-bore stress ratio is > 1 by construction (3-3.9x).
# FMEA records it honestly rather than assuming a redesign that does not exist.
stress_ratio_range = (3.0, 3.9) # x allowable at design bore
regime_extrapolation = (166, 830) # x beyond any device -> D high
assert stress_ratio_range[0] > 1.0 # infeasible as specifiedWhat the stack does about it
- Treats the plug as the limiting component in every burner availability model
- Runs conservative-hold logic that derates before approaching the design bore
- Flags plug telemetry as low-confidence because the regime is un-post-dictable
- Documents coil redesign as the required path, not an assumed one
The plug-coil gate is one of four burner gates; the others are the He-3 supply (~400x), the regime extrapolation, and the availability gap (0.86-0.995 vs 0.99982). See the availability gate and the burner narrative.